Resource-independent execution support on exa-scale systems

 

Service-oriented Operating Systems

Processor and network architectures are making rapid progress with more and more cores being integrated into single processors and more and more machines getting connected with increasing bandwidth. Processors become heterogeneous and reconfigurable, thus allowing for dynamic adaptation to specialised needs. In future, thousands of billions of devices may be connected to form a single computing unit.

No current programming model is able to cope with this development, as they are too tightly coupled with the underlying device structure. Furthermore, complex, non-aligned middlewares and operating systems render the programming model unnecessarily inefficient. In order to realise efficient programmability of terascale devices by experts and average developers equally, a complete new approach to handling these types of devices across all layers is required:

Service-oriented Operating Systems (S(o)OS) address the needs of future distributed systems by drawing from service-oriented architectures (SOA) and the strengths of Grids. S(o) operating systems are modular and minimal, optimised to fit into the cache of distributed compute units and enable process-centric management of resources and distributed execution, thus maximising the resource usage whilst minimising overhead.

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Project News

New Public Deliverable: D5.3 - First Set of OS Architecture Models

The S(o)OS Consortium made available a new public deliverable: D5.3 "First Set of OS Architecture Models".

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CACM is publishing "Why STM Can Be More than a Research Toy"

Communications of the ACM is publishing this month the article "Why STM Can Be More than a Research Toy" by A. Dragojevic, P. Felber, V. Gramoli and R. Guerraoui. This article demonstrates that STM finally wins its spurs by outperforming sequential applications with only four CPU cores.

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Transactional Memory Discussion on LinkedIn

Are Transactional Memories the way forward in scalable computing systems? Software Transactional Memories are better in avoiding deadlocks and in dealing with contention management, and scale better than traditional locking techniques, but on the other hand, transactions are often accused of scaling badly.
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S(o)OS @ CASTNESS 2011

S(o)OS participated to the collaboration workshop on "Computing Architectures, Software tools and nano-Technologies for Numerical and Embedded Scalable Systems" (CASTNESS) held in January 2011 in Rome, putting together the European Projects belonging to the TERACOMP Future and Emerging Technologies (FET) call on terascale systems.

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Related News

Presentation of First 64-Bit ARM Processors

The first 64-bit ARM architecture compliant processor, named X-Gene, has been presented by Applied Micro Circuits Corp. X-Gene is a multi-core processors design based on high-performance ARMv8 compliant cores expected to operate at up to 3.0GHz and expected to be used in cloud computing, wireless infrastructure, enterprise networking, storage and security application markets.

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Debian GNU/Hurd "Wheezy" release

The Debian development team has anounced their plans for a Debian GNU/Hurd release in conjunction with other Debian "Wheezy" releases when it's out in late 2012 or early 2013. The Hurd is a kernel that consists of a set of protocols and servers that run on the Match microkernel, to complete the GNU operating system.

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WebCL: executing OpenCL from the browser

A few months ago WebGL, a software library that extends JavaScript to allow it to generate interactive 3D graphics was released, yesterday it was the turn of WebCL, with the aim of allowing modern browsers to execute OpenCL kernels from javascript code. This brings GPGPU computing into web pages.

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Events

HPDC'21 - call for papers

The 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'12) is calling for papers and workshop proposals.
HPDC is the premier annual conference on the design, the implementation, the evaluation, and the use of parallel and distributed systems for high-end computing. HPDC'12 will take place in Delft, the Netherlands, and will be held on June 20-22, with affiliated workshops taking place on June 18-19.

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2011 Spring Simulation Multiconference (SpringSim'11)

The 2011 Spring Simulation Multiconference (SpringSim'11) will be held on April 4 - 7, 2011 in Boston, MA, USA.

 

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ACM/IEEE International Symposium on Networks-on-Chip (NOCS)

The Fifth ACM/IEEE International Symposium on Networks-on-Chip (NOCS) will be held on May 1-4, 2011, in Pittsburgh, Pennsylvania, USA.

 

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