The second issue of the S(o)OS Newsletter is out. The newsletter has the purpose of spreading the word about the research issues that are being investigated in the project and the approach we are following for addressing them.

Modern IT infrastructures constantly increase in scale, heterogeneity and complexity. With the introduction of the many core processor, even the average personal computer has been turned into a parallel machine, thus giving rise to a complete new computing paradigm - yet we still treat computers like a single von Neumann instance.

The many-core era is changing the way we write programs. In fact, by multiplying the number of cores and no longer their clock frequency to provide higher performance capabilities without increasing energy consumption [1], many-cores make concurrency a de facto principle that programmers must take into account.

Modern compute infrastructures and processor architectures expose a wide range of accelerators with different properties to the developer, but also to the Operating System, both of which cannot handle this complexity efficiently and assign the right code to the best-suited processing unit. A means to identify the processing units according to the code requirements is therefore required.

SCHED_DEADLINE is an open-source implementation [1] of an EDF-based [2] resource-reservation scheduler for the Linux kernel, that can be used to enhance predictability in the timing behaviour for real-time and multimedia workloads running on the Linux OS.

Adapteva has announced that is developing a new multicore architecture with up to 4,096 RISC processing cores on a single die.

The company claims that the chip will be achieving a performance efficiency of 70 GFlops per watt. The flagship processor would produce more than five TFlops in double precision at 700 Mhz.

Programming models have evolved over decades to for single-core, single-processor machines. Support for distributed and even parallel execution of code is not an intrinsic feature to most current programming languages and instead have to be painstakingly added and handled by the developer.

Intel published a set of features that new programming models will need to address - find the full article on HPCWire.

More and more information about the latest Blue Gene/Q(TM) (BGQ) series of supercomputers by IBM is becoming available. Capitalizing on the experience gained by building the two earlier generations of supercomputers (the Blue Gene/L(TM) and Blue Gene/P(TM) series), in the BlueGene/Q series IBM has put together a number of innovations that promise to realize unprecedented performance, scalability, reliability and at the same time energy efficiency.

The 3rd International Workshop on Analysis Tools and Methodologies for Embedded and Real-time Systems (WATERS 2012) will be held on July 10th in Pisa, Italy, co-located with the 24th EUROMICRO conference Real-Time Systems (ECRTS 2012).

The 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'12) is calling for papers and workshop proposals.
HPDC is the premier annual conference on the design, the implementation, the evaluation, and the use of parallel and distributed systems for high-end computing. HPDC'12 will take place in Delft, the Netherlands, and will be held on June 20-22, with affiliated workshops taking place on June 18-19.

The Fifth ACM/IEEE International Symposium on Networks-on-Chip (NOCS) will be held on May 1-4, 2011, in Pittsburgh, Pennsylvania, USA.